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How Does the FMC (FPGA Mezzanine Card) Standard Measure up Against the PMC/XMC Format for Embedded Defense/Aerospace Applications

February 16, 2011 | BY: Jeremy Banks

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Interest in reconfigurable embedded computing in the defense and aerospace market has grown significantly as new generations of FPGAs present developers with a level of processing performance and potential I/O bandwidth that cannot easily be matched by conventional CPU configurations. There are many COTS solutions that allow developers to readily make use of FPGAs for processing, but the real challenge to an application is often measured in terms of I/O bandwidth, latency and connectivity. For example, military Electronic Counter Measures (ECM) applications require high bandwidth data input, processing and data output with minimum latency. FPGA Mezzanine Card (FMC) directly addresses the challenges of FPGA I/O by solving the dual problem of how to maximize I/O bandwidth, while still being able to change the I/O functionality. The elegance of the FMC solution is in its simplicity. On FMC modules there are only I/O devices, such as ADCs, DACs or transceivers. The modules have no on-board processors or bus interfaces, such as PCI-X. Instead, FMC modules take advantage of the intrinsic I/O capability of FPGAs to separate the physical I/O functionality on the module from the FPGA board design of the module's host, while maintaining direct connectivity between the FPGA and the I/O interface.


Darwin's theory of evolution doesn't necessarily apply to just the plant and animal world, as evidenced in the embedded computing industry, where only the fittest mezzanine card formats have survived. A wide variety have come and gone, with only the best formats gaining broad market appeal, with some specializing and excelling in niche areas. Others have been consigned to the drawing board of history. The reasons for this are many. 

Mezzanines for Rugged Computing

Perhaps the strongest mezzanine format for defense embedded computing is PMC (IEEE 1386.1-2001[1]), which uses the PCI and more recently PCI-X bus (ANSI/VITA 39-2003[2]), and offers higher levels of ruggedization defined in ANSI/VITA 20[3]. PMC has succeeded because it has been able to evolve through speed improvements and environmental specifications. PMC has also been able to meet a wide range of market needs including sufficient space to implement useful functionality. PMC's latest incarnation is XMC (ANSI/VITA 42.0[4]) where the parallel PCI or PCI-X bus has been replaced with a serial interface, of which the most common protocol supported is PCI Express® (ANSI/VITA 42.3-2006[5]). Interfaces such as PCI, PCI-X, PCI Express and Serial RapidIO® have evolved to address the needs of computer systems dominated by conventional CPUs, and the need for standard interfaces that abstract the specific details of their hosts.

Jeremy Banks, ISR, embedded computing

Author’s Biography

Jeremy Banks

Product Marketing Manager, ISR Solutions

Jeremy Banks is a Product Marketing Manager for Sensor and I/O Processing in the ISR group at Curtiss-Wright. He has been involved in the defence embedded computing industry for over 25 years holding positions in engineering design, marketing and product management in DSP, Multi-Processing, RF IO, SBCs, FPGAs and System solutions. Jeremy is a graduate of the University of Surrey in Electronic and Electrical engineering.

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