New Hybrid FPGA Devices a Game-Changer for Radar and Signal Processing

New Hybrid FPGA Devices a Game-Changer for Radar and Signal Processing

Published in Military Embedded Systems
By Mike Southworth

The three traditional compute architectures used for high-performance embedded computing (HPEC) and radar processing are CPUs [central processing units], GPUs [graphics processing units], and FPGAs [field-programmable gate arrays]. In many cases, a combination of these technologies is employed within a single subsystem, with software applications and workload optimizations influencing hardware selection.

While GPUs have received much attention in recent years and are the dominant architecture of choice in the data center market for artificial intelligence (AI) applications, they also have constraints such as very high-power consumption, short product life cycles, and compatibility requirements for specific software development frameworks and architectures. For some applications, depending on how the software is written, FPGA devices may provide a compelling alternative to GPU processing. For example, algorithms developed for radar processing tend to be optimized for digital signal processing and FPGA environments.

Military and aerospace defense integrators, especially in the signal-processing application space, have typically turned to low-latency FPGA devices as coprocessors for signal-processing CPUs, forming the technical pillar for ingesting and processing massive amounts of time-critical radar and sensor data. More recently, FPGA vendors have begun to evolve discrete devices into hybrid, multifunction system-on-chip (SoC) solutions that bring much greater flexibility and capabilities to signal processing applications. For example, AMD (formerly Xilinx) offers a family of adaptive compute acceleration platform (ACAP) devices with a heterogeneous architecture that combines traditional programmable FPGA logic with powerful CPUs, a variety of DSP and math engine accelerators, and high-speed network fabrics. Moreover, ACAP devices such the AMD Versal Premium VP2502 ASoC (adaptive system-on-chip) now include AI accelerators. This top-of-the-line Versal device provides 472 adaptive intelligence engines, with 157 TOPS [trillions of operations per second] performance, which can be used to support AI, machine learning (ML), and 5G signal processing.

Read the full article.