3U VPX is small form factor solution for military applications

October 07, 2008 | BY: Mike Slonosky

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Military system designers demand higher speeds, more bandwidth, and serial fabric connectivity than CompactPCI can provide, forcing the use of proprietary solutions. The new 3U VPX and VPX-REDI open standards offer however a COTS remedy, demonstrated in this article by a mission computer case study.

As demands for reduced size, weight and power have risen for embedded military and aerospace systems, the size and modularity of the 3U form factor in particular have made it the card size of choice for a large number of the latest technology platforms, such as UAVs. Accordingly, although CompactPCI has become an increasingly popular 3U choice in military/ aerospace embedded system design, military system designers continue to demand higher speeds, more bandwidth, and serial fabric connectivity than it can provide. These demands are outstripping the capabilities of CompactPCI, forcing military systemdesigners to turn to proprietary solutions in order to find all these features in single-board architecture.

Enter the new 3U VPX (VITA 46) and VPXREDI (VITA 48) open standards, which offer several advantages over 3U CompactPCI. 3U VPX provides a standards-based COTS remedy that can support military applications and provide the faster speeds, higher bandwidth, and improved connectivity via high-speed serial fabrics that 3U CompactPCI cannot. This can be clearly seen in a mission computer case study such as the one presented herein.

One point for designers to consider when choosing between VPX and CompactPCI, is that the bandwidth of the PCI bus of CompactPCI does not support high-speed applications such as signal processing and radar. Designers of these higher-bandwidth applications want to take advantage of the faster speeds made possible with serial switched fabrics, such as PCI Express (PCIe) and Serial RapidIO, shown in Table 1.

The maximum transfer rate in a six-slot 32-bit CompactPCI bus is 33MHz or 133 Mbit/s, not nearly fast enough for the intercard bandwidth requirements in high-performance systems requiring higher than 1.5 Gbit/s. In addition, new multicore platform processors come with embedded, high-speed fabric interconnects that 3U CompactPCI simply cannot take advantage of to their fullest extent. The 3UVPX andVPXREDI standards were created with these limitations inmind. Both standards deliver an order of magnitude higher bandwidth than older small formfactors,withVPX and VPX-REDI delivering 4 to 5 Gbit/s with the defined eight fabric lanes of either PCIe or Serial RapidIO. For highspeed, bandwidth-intensive applications, VPX MultiGig RT2 connector supports signaling up to 6.25 Gbit/s on each differential pair and more with advanced SERDES technologies. 3U VPX can thus take complete advantage of the highspeed interconnects provided with new multicore platform processors. For example, the P.A. Semi 1682 has 24 flexible SERDES engines, and the Freescale 8641 has dual eight-lane PCIe or SRIO ports.

One of the benefits of VPX is its compatibility with high-speed serial fabrics for improved connectivity. For inter-processor communications in a typical 3U CompactPCI system, communications occur over the CompactPCI bus. As the bus is only 32 bits wide, has a maximum clock rate of 33 MHz in a six-slot system, and is shared among all cards present on the bus, high-performance data transfer between cards is limited to 133 Mbytes/s. If necessary, designs could make use of high-speed fabrics such as StarFabric to interconnect processors directly and bypass the CompactPCI bus, effectively increasing the system bandwidth by using this sideband link. But the added cost and power that result mean that the mezzanine sites are not available for other functions. The effect is to limit 3U CompactPCI system functionality. VPX, on the other hand, was designed to allow system designers to interconnect cards with high-speed serial fabric directly on the backplane. Today, newer multicore platform processors can include a multitude of high-speed serial fabric interfaces on-chip.When these new processors are combined with the VPX ability to handle high-speed fabrics, it is possible to increase system performance, reduce power consumption, and reduce board count. Increased system performance, combined with reduced power consumption and board count becomes highly relevant in critical systems such as mission computers aboard smaller aircraft. In an airborne platform, themission computer functions can include signal processing, subsystem exception and status management, mission profile storage, pilot work offload, moving maps, and information control.

These systems may experience severe space and weight constraints in very small aircraft, such as a small, two-seater, turboprop aircraft used in military training. For example, a lightweight, compact, conduction-cooled processor and graphics display controller subsystem that functions as a typical mission computer can be built today out of commercial components, such as 3U CompactPCI SBCs. Figure 1 shows a mission computer design consisting of six cards.A pair of SBCs is used for the signal processing function utilizing a Star Fabric link for high-speed interprocessor communications between the pair. A second pair of SBCs, each with a graphicsmezzanine card, is used to performthe graphics functions. The fifth SBC provides a 1553 PMCmezzanine card to handle the 1553 protocol. The sixth slot CompactPCI carrier card holds an analog board. This analog board may be an ARINC 429 mezzanine card or another type of analog board with A/D and/or 28 V external signaling.VPX technology, along with the new platformprocessors with integrated serial fabrics, allows the system designer to combine the signal processing and graphics functions on only two processor cards. Figure 2 shows an equivalent mission computer using a 3U VPX system. This mission computer is implemented with only two processor cards and two carrier cards,where each processor card hosts a graphicsmezzanine.An example of a processor card is Curtiss-Wright Controls Embedded Computing 1GHz Freescale MPC864xD-based VPX3-127 SBC (figure 3).

3U VPX allows the board designer to make full use of the features of this next generation of platformCPU chips in the most efficientmanner. The high-speed serial interfaces of these chips can be directly connected to the VPX backplane without the need for serial-toparallel bridge conversion chips, as would be needed with CompactPCI. The two serial interfaces can operate at an aggregate bandwidth of 4 GBps using the PCIe protocol, compared to the shared 133 MBps of CompactPCI. The serial interfaces can also provide the interprocessor communication function that was provided by the sideband StarFabric link shown in the CompactPCI example. I/O bandwidth on the 3U VPX boards is also greatly enhanced: each pin on VPX can achieve 6.25 Gbps, enabling next-generation I/O such as SATA, 10 GbE, and high-resolution graphics attachments.

The third and fourth slots contain carrier cards, such as the Curtiss-Wright VPX3-215 ExpressReach, a 3U VPX I/O expansion carrier card that provides XMC and PMC hosting capabilities. In this example, the carrier card in slot three holds a 1553 mezzanine card. Since one of the cores on the platform CPU in the first slot can easily handle the 1553 protocol processing, a separate SBC is not required. The carrier card in the fourth slot case holds the analog mezzanine card as in the CompactPCI system, and again since one of the cores on the platform CPU in the second slot can easily handle the analog processing.

In the future, the trend will be toward the increased use of 3U technology as well as continued expansion of functionality and performance. In the past, systems based on 3U CompactPCI and now 3U VPX have been used primarily in mission control computers. But with the advent in the next several years of quad and octal core processors from various CPU chip manufacturers, the 3U VPX form factor will be able to support higher-performance systems (DSP, signals intelligence) with less space, weight, and power and for a lower cost.

Author’s Biography

Mike Slonosky

Product Marketing Manager, Power Architecture SBCs

Michael Slonosky is the Product Marketing Manager for Power Architecture Single Board Computers in the C4 Solutions group at Curtiss-Wright. He has been with Curtiss-Wright for 13 years after spending over 20 years in the telecom industry. Mike is a graduate of the University Of Manitoba with an Masters of Science in Electrical Engineering.

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