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History and Future of Digital Signal Processors

October 27, 2014 | BY: Marc Couture

DSPs, digital signal processors, have made quantum leaps in performance since the 1980s, supporting the increasing data demand of military and aerospace applications, such as radar, signal intelligence and electronic warfare. A brief review of the past is useful in understanding where we are now.

The early analog chips, such as those brought to market by Texas Instruments in the 80s, did an excellent job at executing fixed-point math operations. They were, however, difficult to program, supported only by lower-level languages.

Intel's i860, a reduced instruction set computing (RISC) device, took DSP to the next level. Using C language, the i860 was easier to program and capable of handling the necessary DSP math via floating point operations. As a result, the i860 was widely adopted for applications such as radar and signal intelligence.

However, Intel exited the defense arena temporarily due to its relatively small presence in the digital signal processing market. And Freescale - then Motorola Semiconductor - entered with Power Architectures and the vector engine concept, capable of performing vast amounts of floating point operations with a single click of the chip clock. Branded as AltiVec, this technology was adopted by many radar engineers for its impressive processing power. It also caught on for ISR, intelligence surveillance and reconnaisance.

Then, due to economics, Freescale switched focus in the early 2000s to telecommunications and other markets, and temporarily stopped focusing on AltiVec. Over the last several years, Intel has gained market presence in defense, while Freescale has come back with AltiVec and multicore chips.

Now the future of DSPs appears to lie in multi-core processors, such as Intel's Xeon. The Xeon Phi chip contains more than 60 processors - the equivalent of 15 laptops. And Intel's mobile class processors feature four cores with a built-in GPU, offering prime efficiency in floating point operations per watt.

Another trend is a blending of traditional lines of DSP technology, to further accelerate performance. Examples include embedding field programmable gate arrays (FPGAs) into other chip architectures and adding ARM cores to GPU processors and FPGAs, making the GPUs and FPGAs more autonomous.

More memory also is coming onboard chips. In the past, kilobytes and then megabytes were put into cache, and now gigabytes will be appearing right on the chip die, immensely decreasing latency.

Technology continues on a course to increase performance in less space and with less power. Contact a Curtiss-Wright representative to help you gain the most from these advances and performance per unit of power.

Author’s Biography

Marc Couture

Senior Product Manager for Intel, Power Architecture, and GPGPU based Digital Signal Processors

Marc Couture is the Senior Product Manager for Intel, Power Architecture, and GPGPU based Digital Signal Processors in the ISR Solutions group at Curtiss-Wright. He has worked in the Embedded COTS industry for over 20 years having specialized in High Performance Embedded Computing and RF/Microwave technologies. Marc is a graduate of the University of Massachusetts Dartmouth with a Masters of Science in Electrical Engineering.

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