ADC-MOD2 Dual 125 MSPS 14-bit ADC

The front panel ADC-MOD2 mezzanine module supports development of embedded applications as it drives analog I/O functionality to our Virtex-5 FPGA-based processing PMC modules. The ADC-MOD2 supports 14-bit analog to digital conversion via two 125 MSPS channels.

The ADC-MOD2 supports Software Defined Radio, radar and telecommunications applications. Features of the ADC-MOD2 include an onboard 125MHz oscillator and a connection for an external clock source. To provide complete application control, the module makes the sampling clock and trigger available to the host FPGA. The host FPGA controls general purpose digital I/O signals, routing them to the front panel, to synchronize multiple boards or trigger mechanisms.

The ADC-MOD2 is part of the Curtiss-Wright Defense Solutions I/O module product line designed for the Xilinx® Virtex®-5 based PMC-FPGA05 and XMC-FPGA05D. They provide developers a choice of I/O to be connected directly to the host FPGA PMC/XMC, offering a highly integrated processing solution that prevents bottlenecks.

The PMC-FPGA05 and XMC-FPGA05D I/O products offer a simple concept: a module that consists only of analog converters or transceivers, buffers and connectors. Data handling and interface timing is controlled by the host FPGA. Curtiss-Wright offers a design reference for developing new modules. Thanks to the simplicity of the modules' design, development of new application-specific modules is a straightforward process, so long as enough PCB space is available.

Host connectors for the modules accommodate as many as 138 signals through a direct connection to the FPGA. To optimize flexibility and data speed, these signals are routed as LVDS pairs. Depending on the host board's capabilities, four of the digital I/O pairs can facilitate local or global clock signals. The host FPGA is programmed to recognize the impedance of the interface and the interface's other characteristics.

The module connector of the host FPGA also accommodates a variety of power supplies, which include 2V5, 3V3 and 5V. This product feature makes good use of space as it minimizes the room required for module-specific power supply generation. This leaves more space to accommodate the module's I/O.

  • Downloads
  • Front Panel Analog Signal Input:
    • Number of Channels 2
    • Connectors AC coupled, frontpanel MMCX connector
    • Full Scale Input +10 dBm (2V pk-pk) into 50 ohms
    • SNR 68dB
    • SFDR 82dB
  • A/D Converter:
    • Quantity 1
    • Type Linear Technology LTC2285
    • Sampling Rate 125MSPS
    • Resolution 14 bits
    • Bandwidth 100kHz to 110MHz full power bandwidth
  • External Clock Input:
    • Connector Front Panel MMCX
    • Input Level 200 - 1000 mV pk-pk, sine or squarewave
    • Input Impedance 50 Ohms, AC coupled LVPECL
    • Clock Selection Controlled by FPGA
  • Trigger:
    • Single-ended, 50 Ohm, DC coupled
PMC-FPGA05 Xilinx Virtex-5 FPGA PMC

PMC-FPGA05 Xilinx Virtex-5 FPGA PMC

The PMC-FPGA05 Xilinx Virtex-5 LX110 or LX155 FPGA based PMC module offers high-speed, customizable data I/O and PCI-X interface to the host computer. The powerful FPGA is boosted by multiple banks...


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