VPX3-530 3U VPX Virtex-7 FPGA ADC/DAC
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- VPX3-530 3U OpenVPX High Speed Transceiver Product Sheet
- VPX3-530 Demo/Reference Examples
- Software Defined Radio and Electronic Warfare System Product Sheet
- Dual 4 GSPS Transceiver with User-Programmable FPGA Quick Start Kit Datasheet
- Dual 4 Gsps 12-bit or Quad 2 Gsps 12-bit analog inputs/li>
- Dual 5.6 Gsps 14-bit DAC update rate (maximum 2.8 Gsps data rate)
- Multi-board, multi-channel synchronization
- Xilinx user programmable Virtex-7 VX690T FPGA
- Up to 8 Gbytes DDR3L SDRAM (64-bit data paths)
- 3U OpenVPX compliant
- Onboard power and temperature measurement
- VxWorks and Linux host support
- Air- and Conduction-cooled variants
- Electronic Warfare (EW)
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High Speed Transceiver with Xilinx Virtex-7 FPGA
The VPX3-530 combines multiple channel high-speed ADCs and DACs with a latest generation user programmable Xilinx Virtex-7 FPGA in a range of rugged build formats for demanding applications such as SIGINT, radar and Software Defined Radio (SDR).
Up to four analog inputs are supported by the VPX3-530. These analog inputs can be configured as dual 4 Gsps/12-bit using native interleaving of the ADC devices or four 2 Gsps/12-bit channels. Each analog input is AC coupled via baluns for maximum ADC performance.
Complementing the analog inputs are two 5.6 Gsps 14-bit DACs. Each DAC has a maximum data rate of 2.8 Gsps. Outputs above 2.8 Gsps are achieved through data interpolation modes.
Sample rates above 2 Gsps use interleaved ADC modes. For optimal ADC input performance, the VPX3-530 is available in options for up to 2 Gsps ADC or 2 to 4 Gsps configurations. See graphs (Figures 3-6) for performance characteristics for the analog input and outputs.
All analog I/O connectivity is provided through the front panel via rugged SSMC connectors.
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