VPX3-530 3U VPX Virtex-7 FPGA ADC/DAC

The VPX3-530, a rugged dual channel 4GSPS ADC/DAC packaged in the compact 3U form factor, is the ideal solution for SWaP-constrained defense applications such as SIGINT, ECM and Radar Warning Receivers (RWR). The card is available in air- and conduction-cooled formats with a user-programmable Xilinx Virtex-7 FPGA. It provides two 4GSPS 12-bit (or four 2GSPS) analog inputs and two 5.6GSPS update rate (maximum 2.8GSPS data rate) 14-bit analog outputs with XC7V690T FPGA.

The VPX3-530 3U VPX Xilinx Virtex-7 FPGA ADC/DAC Card may be used in two ways – alongside a Single Board Computer (SBC) for simple configurations or in a larger array of synchronized high-speed analog I/O components. The VPX3-530 FPGA ADC/DAC Card provides in one unit all the necessary I/O resources for the ADC, DACs, high-speed DDR3 SDRAM, high-speed PCI Express (PCIe) and serial links – along with FPGA-driven parallel IO to the OpenVPX backplane.

The FusionXF Development Kit complements the VPX3-530 by providing infrastructure and by supporting HDL development, multi-processing applications and software. In addition, Wind River® VxWorks and Fedora™ Linux operating systems are supported by the processors that interact with the VPX3-530.

VPX3-530 users have the choice of two RF sample clock sources available through the front panel. This provides options of independent sample clock for the ADCs and DACs or synchronous ADC and DAC data sampling, to support separate ADC and DAC operation or coherent input and output sampling. The VPX3-530 uses an external clock source to optimize performance.

At the core of the VPX3-530, the user-programmable Xilinx Virtex-7 VX690T FPGA is supported by high-speed DDR3L memory resources. These include flash memory or DDR SDRAM configuration memory, which are capable of storing FPGA configuration images. The host CPU, by way of a PCI Express® (PCIe) interface updates these images. Configurations are downloadable from the host, through DDR SDRAM, bypassing the non-volatile flash.

The SDRAM-based configuration, because it is volatile, serves security-sensitive applications. This configuration is also best suited for facilitating declassification when needed. The FPGA may be reconfigured with an array of indexed images available in flash, including write-protected recovery. Flash and DDR SDRAM provide AES encryption for FPGA configuration.

The VPX3-530 3U VPX Xilinx Virtex-7 FPGA ADC/DAC Card provides 2x 512 M x 64-bit DDR3L SDRAM. These memory banks, which support read or write bandwidths of about
9.6 Gbytes/sec, are directly and independently connected to the FPGA.

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Analog Inputs

Number of Channels

2x 4 GSPS or 4x 2 GSPS

ADC native resolution

12-bit

Analog Bandwidth

1.5 GHz @ 2 GSPS

Analog Outputs

Number of Channels

2x 5.6GSPS update rate (up to 2.8GSPS direct RF synthesis)

DAC native resolution

14-bit

FPGA

Type

Xilinx Virtex-7 VX690T, speed grade 2

Configuration

FLASH or DDR

Memory

Type

DDR3L SDRAM

Size

2x 2 or 4GB banks, 64-bit data per bank

OpenVPX

Profiles

MOD3-PAY-1D-16.2.6-2 and MOD3-PER-1F-16.3.2-2

VPX P0

5V, 3V3_Aux, VBAT, 1PPS, JTAG, REF_CLK

VPX P1

x8 PCIe Gen 1/2 (contact factory for PCIe Gen 3), x8 FPGA HSS links

VPX P2

x28 LVDS IO, 2x RS485 input, 2x RS485 output

Software/HDL

Tools

FusionXF for VxWorks or Linux (contact factory for Windows support)

Examples

ADC/DAC capture/replay, memory, data DMA

 

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