CAML-MOD3 CameraLink module
The CAML-MOD3 CameraLink I/O Module is part of the Curtiss-Wright Defense Solutions family of I/O modules, which is available to system developers for use with our PMC-FPGA05 and XMC-FPGA05D Xilinx Virtex-5 FPGA PMC/XMC products.
Bringing CameraLink I/O functionality to FPGA-based processing PMC modules, the CAML-MOD3 front panel mezzanine module is designed to provide imaging and machine vision for embedded application development programs. In basic mode the module supports two digital cameras, and one camera in medium or full mode.
The base mode provides 8-bit input; medium, 16-bit; and full, 24-bit. The 24-bit option supports RGB camera operation (R: 8-bit, G: 8-bit and B: 8-bit). Ideal applications for the CAML-MOD3 include inspection systems and medical imaging.
The Curtiss-Wright I/O module family offers a choice of direct I/O connectivity to the host FPGA PMC/XMC, removing bottlenecks and facilitating a highly integrated processing solution with I/O.
The I/O modules for PMC-FPGA05 and XMC-FPGA05D products are designed to deliver simplicity for developers. The modules consist only of analog converters or transceivers, buffers and connectors, while the host FPGA takes care of controlling interface timing and data processing. Because of the I/O modules' simple design development of new application-specific modules is a relatively straightforward process when available PCB space is sufficient. Curtiss-Wright provides developers with a design reference to further facilitate new module development.
The FPGA host connector of the I/O modules has the capacity to accommodate up to 138 signals directly to the FPGA. These signals are routed as LVDS pairs, maximizing data speed and flexibility. Four of these pairs can be designated for global or local clock signals, depending on the host board's capabilities. Curtiss-Wright programs the FPGA to determine characteristics of the interface such as impedance.
To minimize space requirements, the host module connector accommodates several power supplies, such as 2V5, 3V3 and 5V. By reducing the amount of space required for power, the modules help conserve PCB space for the modules' I/O.
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- CameraLink - PMC Front Panel Mezzanine Module
- Supports Base, Medium and Full mode Camera Link implementations
- Up to 85 MHz Camera Link clock rate
- Up to two cameras in Base mode, or one camera in Medium or Full mode
- Two Mini Camera Link interface connectors
- Fully documented example firmware and software with complete source code
The PMC-FPGA05 Xilinx Virtex-5 LX110 or LX155 FPGA based PMC module offers high-speed, customizable data I/O and PCI-X interface to the host computer. The powerful FPGA is boosted by multiple banks...
The XMC-FPGA05D high density I/O PMC/XMC module controlled by a user programmable Xilinx Virtex-5 FPGA and supported by a range of front panel I/O modules including analog I/O, RS-485/422, LVDS and...
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