RBDS-120 RF Receiver, Bit Sync, Decom, Sim, and IRIG Time Code Reader

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RBDS-120 RF Receiver, Bit Sync, Decom, Sim, and IRIG Time Code Reader
Product Sheet
Product Sheet

The RBDS-120 combines the functions of RF receiver, bit synchronizer, data decommutator and simulator into a single full-size PCI bus card.

Key Features

  • PC-based PCI bus full-size card with RF receiver, bit synchronizer, data decommutator, simulator, and IRIG time code reader
  • RF receiver
    • L band or S-band coverage
    • Selective tuning with 20 kHz tuning steps
    • 4 selectable IF bandwidths; 0.5 to
    • 20 MHz available
  • Bit sync
    • Bit rates up to 10 Mbps, NRZ Codes
    • Input signal amplitudes from 0.1 to 5.0Vp-p
  • Data decommutator
    • PCM input rate up to 20 Mbps
    • Accepts RS-422 or TTL input data and clock
  • Microsoft® Windows® compatible driver software included
  • Supported by third-party data analysis software

Applications

  • Data analysis
  • Data archival
  • Flight test instrumentation
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RBDS-120 RF Receiver, Bit Sync, Decom, Sim, and IRIG Time Code Reader

The RBDS-120 combines the functions of RF receiver, bit synchronizer, data decommutator, and simulator into a single full-size PCI bus card. The card can be installed in a desktop PC for preflight or lab test. The RF receiver has L or S-band coverage (customer specified at time of order). Tuning is in 20Khz steps. There are four selectable IF bandwidths from 0.5MHz to 20MHz. The bit synchronizer provides full-featured clock reconstruction, data recovery, and code conversion. 

The bit sync accepts PCM inputs at rates of up to 10 Mbps for NRZ codes and up to 5 Mbps for BiØ codes with amplitudes from 0.1 to 5.0 Volts p-p. The bit sync input impedance is programmable to 50, 75 or 10K ohms. PCM data and 0°/180° clock bit sync outputs are provided via RS422 and TTL drivers. The bit sync output is also internally connected to the on-card decom. A Bit Error Rate (BER) measurement capability with an on-card test data simulator is included to allow characterization of data link quality. The data decommutator provides full IRIG frame synchronization and data decommutation. The decom accepts PCM data at rates up to 20 Mbps from either an external source or the on-card bit sync (10 Mbps max.). The decom external data and clock inputs are programmable for RS-422 ( 20 Mbps–120 ohm) or TTL (10 Mbps–10K ohm). 

Decommutated data words and frame time tags are made available via the PCI bus for analysis, archival, and monitoring. The card also features a playback mode. In this mode the card regenerates archived PCM data at programmable rates up to 20 Mbps. A parallel output port provides the customer with the frame data and control signals. The customer can cherry-pick any or all desired words from the frame. A DB25 connector is used for each the parallel output port (top of card) and the I/O port (rear of card on rear I/O plate). The rear I/O plate is also equipped with two SMA connectors, one for the RF receiver input (antenna) and one for the analog/TTL direct bit sync input.