A perception that comes up regarding DisplayPort is the allowance for link re-training and the indeterministic behavior that could potentially result.
This paper compares the differences between the commercial use of DisplayPort and safety-critical embedded system. It includes an analysis of DisplayPort link training in a safety-certifiable context.
The DisplayPort interface is based on a packetized digital data transmission protocol. Data payload supports configured to include video, audio, and USB information from a GPU source to a downstream sink device such as an intermediate FPGA or directly to a display. The communication technology is comparable to what is used for Ethernet, USB, and PCI Express®. A sequence of small data packets that comprise a frame are serially transmitted to a sink device. There is no dedicated clock signal since clock information is embedded within each data packet.
The DisplayPort interface includes a bidirectional auxiliary (AUX) channel between the source and destination elements. The AUX sideband interface is utilized for managing and controlling devices, including VESA Extended Display Identification Data (EDID), Monitor Control Command Set (MCCS), and Display Power Management
Signaling (DPMS). The AUX interface also provides link status information used during link training and the ongoing status of data packets received.
There is also a Hot Plug Detect (HPD) signal to indicate to the DisplayPort interface whether a monitor is connected or not.
A key difference between the DisplayPort interface and other communication protocols, such as HDMI, DVI, LVDS, etc., is that the source and destination devices execute a training sequence defined in the DisplayPort specification to configure the link.
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Gregory Sikkens
Senior Product Manager
During his 28 years at Curtiss-Wright, Gregory's current role as Senior Product Manager includes the product lines of Graphics, Arm Single Board Computers, and Safety Certifiable COTS boards. Previously, Gregory also held product development manager, software team lead, and test/ILS engineering positions. Gregory has a Microcomputer Engineering Technologist degree from St. Lawrence College.
