Understanding Power Management of Intel Processors for Mil/Aero Applications White Paper
Understanding Power Management of Intel Processors for Mil/Aero Applications.
A Comparison of OpenVPX System Bandwidth Between Serial RapidIO and 10 Gigabit Ethernet White Paper
This paper compares the bandwidth available to processors resident on the payload boards using the CEN16 switched architecture for Serial RapidIO and 10 Gigabit Ethernet (10GbE).
Serial FPDP - More than an Extension of FPDP White Paper
This paper outlines the concept of Serial FPDP (sFPDP), provides solutions for several types of real-time data scenarios and explains supported topologies.
Effective Use of SCRAMNet GT Network Interrupts White Paper
This document gives an overview of the available network interrupt mechanisms and discusses how to make use of them in software.
A New Technology for Shared-Memory Communication in High-Throughput Networks White Paper
This paper describes SCRAMNet GT, a high-throughput technology for connecting multiple computer platforms to form a single, real-time, distributed processing system in which memory is shared among the computers.
SCRAMNet GT Memory Access (PIO vs DMA) White Paper
This paper discusses the strengths, limitations, and performance characteristics of the methods for accessing GT memory to help ensure that the correct transfer method is selected for the target system.
How Does the FMC (FPGA Mezzanine Card) Standard Measure up Against the PMC/XMC Format White Paper
Interest in reconfigurable embedded computing in the defense and aerospace market has grown significantly as new generations of FPGAs present developers with a level of processing performance and potential I/O bandwidth that cannot easily be matched by conventional CPU configurations.
Interoperability Considerations Between Different Host FMC and FMC Mezzanine Vendors White Paper
In the same way as one might strip out unnecessary weight in a car aimed for racing, the FMC is a performance solution that strips away unnecessary generic interfaces for direct FPGA driven I/O. But that requires knowledge to achieve the desired performance and to ensure the host and FMC module will work well together. This paper outlines some of the considerations in order to assess and the ensure that the host and module will integrate.
Unified Approach to Post Flight Test Analysis White Paper
This white paper highlights common post-test software requirements and suggests solutions that are codified in a new software tool.