Optimizing 100G VPX

Optimizing 100G VPX
Optimizing 100G VPX
March 20, 2023

Optimizing 100G VPX

Published in Military Embedded Systems
Written by Ivan Straznicky

At the 2018 Embedded Tech Trends conference, results were presented from early simulations that conclusively established 100 Gigabit Ethernet could be successfully implemented on VPX using existing and newly announced copper connectors. At that time, many in the industry thought that optical interconnects and fiber would be required to support 100 GbE speeds.

VPX began back in 2005 with a focus on protocols such as Serial RapidIO, which were operating around 2.5 to 3.1 Gbaud/sec per lane. As these protocols progressed with successive generations, and new protocols were considered and adopted, transmission speeds increased substantially. It wasn’t long before industry was designing Gen 3 VPX products at 8 Gbaud for PCI Express and 10 Gbaud for 40G Ethernet. Then along came higher-speed PCIe Gen 4 (16 Gbaud) and 100G Ethernet (25 Gbaud) and it became evident that the VPX transmission channel needed an upgrade.

One of the main elements of the transmission channel is the VPX connector, which is a key enabling technology for 100G systems. Although it was proven back in 2018 that 100G could be achieved using the first two generations of VPX connectors (known as RT2), the more recent VITA 46.30 Higher Data Rate VPX Standard – which supports data rates to at least 25 Gbaud per lane – enables more signal margin and supports larger systems. Currently, there are two options for VITA 46.30 connectors: the TE Connectivity RT3 and Amphenol R-VPX EVO2 connectors, both of which meet the ANSI/VITA 46.30 standard intended for 100G (4-lanes @ 25 Gbaud) systems, and potentially beyond.

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