This white paper looks at the use of open standards-based commercial-off-the-shelf (COTS) technologies to address Trusted Computing requirements in deployable embedded systems for aerospace and defense applications.

This essential guide describes MOSA's significance for defense technology and the roles standards like SOSA, CMFF, CMOSS, VICTORY, GVA, and FACE play.

Designers of high-performance embedded computing modules and systems must understand the technical considerations required to realize the true benefits of 100 Gbps technology fully.

This paper compares the differences between the commercial use of DisplayPort and safety-critical embedded system. It includes an analysis of DisplayPort link training in a safety-certifiable context.

The SOSA Technical Standard combines MOSA principles with security to enable secure sensor processing systems to be quickly developed and deployed in a low-risk environment.

This white paper presents a strategic framework for addressing obstacles to efficient communications and how best to maintain seamless connectivity through the utilization of open standards-based, field-proven Curtiss-Wright hardware and software.

Safety certification for military embedded systems can be time consuming, complex, and costly to complete. Curtiss-Wright offers an extensive catalog of safety-certifiable COTS hardware modules to suit application requirements.

This white paper examines how building a system with a dissimilar redundant architecture can help overcome the challenges of meeting DO-254/178 DAL A requirements.

Review the challenges for deploying QR encryption and how to implement DAR and data-in-transit QR encryption solutions using commercial FPGA devices and off-the-shelf hardware.

The goal of post-quantum cryptography is to develop cryptographic systems that are secure and can interoperate with existing communications protocols and networks.

There is a popular industry misconception that Intel processors draw more power than Power Architecture and Arm processors. This paper discusses how that is not the case.

This white paper examines the key challenges multi-core processors present in safety-certifiable systems, and the traditional and newer, more effective techniques for alleviating them to ensure MCP-based systems will safely perform their intended functions.