How Does the FMC (FPGA Mezzanine Card) Standard Measure up Against the PMC/XMC Format White Paper
Interest in reconfigurable embedded computing in the defense and aerospace market has grown significantly as new generations of FPGAs present developers with a level of processing performance and potential I/O bandwidth that cannot easily be matched by conventional CPU configurations. There are many COTS solutions that allow developers to readily make use of FPGAs for processing, but the real challenge to an application is often measured in terms of I/O bandwidth, latency and connectivity. For example, military Electronic Counter Measures (ECM) applications require high bandwidth data input, processing and data output with minimum latency. FPGA Mezzanine Card (FMC) directly addresses the challenges of FPGA I/O by solving the dual problem of how to maximize I/O bandwidth, while still being able to change the I/O functionality. The elegance of the FMC solution is in its simplicity. On FMC modules there are only I/O devices, such as ADCs, DACs or transceivers. The modules have no on-board processors or bus interfaces, such as PCI-X. Instead, FMC modules take advantage of the intrinsic I/O capability of FPGAs to separate the physical I/O functionality on the module from the FPGA board design of the module's host, while maintaining direct connectivity between the FPGA and the I/O interface.
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