Increasing Memory Capacity by 400% to Solve Sensor Fusion Challenges

Increasing Memory Capacity by 400% to Solve Sensor Fusion Challenges
Increasing Memory Capacity by 400% to Solve Sensor Fusion Challenges
Case Study
January 31, 2017

Increasing Memory Capacity by 400% to Solve Sensor Fusion Challenges

Today, modern sensors in all Intelligence, Surveillance, Reconnaissance (ISR) technology segments output more data than ever before. For instance, electro-optical infrared (EO/IR_focal plane arrays have far greater resolution and frame update rates than ever before. Radar phased arrays have higher element counts and higher I/Q bit depths on the egress. Signal Intelligence (SIGINT) systems have Radio Frequency tuners with wider instantaneous bandwidths and therefore higher throughput digitized IF at the output. Additionally, all of these sensors have higher density channel counts than previous generation sensors.

A customer familiar with this problem came to Curtiss-Wright Defense Solutions with the added compound problem of Sensor Fusion applications; These applications often see a firehose of data from each of these ISR segment sensors that aggregate to a single processing subsystem. In some cases, even existing solutions such as the Curtiss-Wright CHAMP-XD2 6U OpenVPX modules with 32 GB of DDR4 per each of two Intel Xeon D processor devices become memory bound. Despite 32 GB representing an enormous amount of capacity, there is so much sensor data throughput at the ingress of a processing module in a Sensor Fusion application; even this amount of DDR4 is insufficient to buffer the onslaught of data.

Tackling the challenge of only 32 GB of memory head-on, the Curtiss-Wright team was able to offer the customer a 400% increase in memory capacity with a total of 128 GB. By increasing the capacity while keeping the Xeon D core count the same, Curtiss-Wright was able to provide the buffer depth needed by the Sensor Fusion application to allow a sufficient snapshot of aggregated sensor data to be prosecuted in real-time, with no loss of data. Of particular note, the CHAMP-XD2M’s maximum memory topology represents state of the art in the memory-down design, requiring the caliber of Curtiss-Wright’s world-class engineering capability. This enables the production of a module that can meet the unparalleled demands of the ISR sensor-equipped warfighter.

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