Showing 205 - 216 of 228
Multi-channel, Multi-board Coherency for SWaP-Constrained SIGINT and EW

Multi-channel, Multi-board Coherency for SWaP-Constrained SIGINT and EW

Many new SIGINT and EW systems are being deployed on small platforms but still require sophisticated capabilities, such as multi-channel, multi-board coherency that enables beamforming. This white paper discusses a 3U VPX FPGA solution for this.

04/03/2015
Understanding Intel Processor Throttling for Defense Applications

Understanding Intel Processor Throttling for Defense Applications

This paper presents the basics of Intel processor throttling, and the advanced cooling techniques needed to ensure consistent performance for defense applications.

03/03/2015
Reducing Development Cycles for 3U VPX Systems

Reducing Development Cycles for 3U VPX Systems

This white paper outlines the key challenges system integrators face when building a system with 3U VPX COTS-based solutions and explains methods to shorten development cycles.

02/18/2015
Arm Cortex Processor Technology

Arm Cortex Processor Technology

This white paper focuses on three Arm-based cores - the A7, A53, and A57 - and their benefits to embedded computing.

02/13/2015
Basic Elements of MIL-STD-461

Basic Elements of MIL-STD-461

This white paper supplies a summary of the MIL-STD-461 standard and presents some ideas regarding ways to achieve compliant designs.

01/08/2015

Modular Approach to Rugged COTS Data Storage Selection White Paper

Data storage plays a key role in Defense and Aerospace deployed data gathering system applications.

Analog Input Performance of VPX3-530 White Paper

This white paper provides the typical (measured) performance of the analog inputs of the VPX3-530.

Enhancing the PCM/FM Link - Without the Math White Paper

This paper focuses on a quantitative approach to improving the rate and quality of data using existing PCM/FM links.

Serial FPDP - More than an Extension of FPDP White Paper

This paper outlines the concept of Serial FPDP (sFPDP), provides solutions for several types of real-time data scenarios and explains supported topologies.

Effective Use of SCRAMNet GT Network Interrupts White Paper

This document gives an overview of the available network interrupt mechanisms and discusses how to make use of them in software.

A New Technology for Shared-Memory Communication in High-Throughput Networks White Paper

This paper describes SCRAMNet GT, a high-throughput technology for connecting multiple computer platforms to form a single, real-time, distributed processing system in which memory is shared among the computers.

SCRAMNet GT Memory Access (PIO vs DMA) White Paper

This paper discusses the strengths, limitations, and performance characteristics of the methods for accessing GT memory to help ensure that the correct transfer method is selected for the target system.