Curtiss-Wright Honored to Host Tri-Service Open Architecture Interoperability Demonstration TIM & Expo
Curtiss-Wright has announced that it is serving in the honored role of Distinguished Host for the Tri-Service Open Architecture Interoperability Demonstration (TSOA-ID) TIM & Expo being held March 15 at the Solomons Inn Resort, Marina, MD.
Intel CPUs Power Processor Cards at the Edge
Designed with Intel® Xeon® D processor architecture, Curtiss-Wright's CHAMP-XD1 processor card is ideally suited for compute-intensive aerospace and defense applications, meeting the high performance, reliability, and security standards these industries require.
Open Source SDR: a Faster, Better Way to Develop and Deploy EW Capabilities
Maintaining dominance of the electromagnetic spectrum has never been more critical to mission success. The challenge facing system designers is how to accelerate the transition of new communications and electronic warfare (EW) capabilities from concept to the laboratory and then expedite the deployment of those new capabilities to the warfighter.
SAVE this Space: Defining the C5ISR Space for Army Vehicles
To lower the cost and help speed the pace of technology upgrades for C5ISR [command, control, computers, communications, cyber, intelligence, surveillance, and reconnaissance] systems on Army vehicles, the U.S. Army’s Program Executive Officer (PEO) for Ground Combat Systems (GCS) has issued an Interface Description Document (IDD).
Curtiss-Wright Introduces New Starter Kit System and 8-Slot OpenVPX Chassis to Speed Development of CMOSS/SOSA Technical Standard 1.0 Aligned Solutions
New CMOSS/SOSA Technical Standard 1.0 aligned Starter Kit system integrates VICTORY Network, A-PNT and Intel® Xeon Processor SBC. 8-Slot CMOSS/SOSA Technical Standard 1.0 aligned 3U.