This white paper examines how building a system with a dissimilar redundant architecture can help overcome the challenges of meeting DO-254/178 DAL A requirements.

The goal of post-quantum cryptography (PQC), also called quantum-resistant cryptography (QRC), is to develop cryptographic systems that are secure against both quantum and classical computers and can interoperate with existing communications protocols and networks.

In this second paper, we cover challenges for deploying QR encryption, including pre-shared key (PSK) management, RFC 8784 - an extension of Internet Key Exchange (IKE) v2 that allows it to be resistant to a quantum computer by using PSKs, and how to implement data-at-rest (DAR) and data-in-transit (DIT) QR encryption solutions today using commercial FPGA devices and off-the-shelf hardware.

Using a Degraded Visual Environment (DVE) system enables aircraft pilots to visualize the landing area in poor conditions, allowing them a safe, on-time descent to their target destination.

There is a popular industry misconception that Intel processors draw more power than Power Architecture and Arm processors. This paper discusses how that is not the case.

A Type 1 product is a classified or Controlled Cryptographic Item (CCI) endorsed by the NSA for securing classified and sensitive U.S. government information.

This white paper examines the key challenges multi-core processors present in safety-certifiable systems, and the traditional and newer, more effective techniques for alleviating them to ensure MCP-based systems will safely perform their intended functions.

Learn about the NSA CSfC program, data at rest encryption, capability package, protection profiles, components & layers, and trusted integrators.

Explore Curtiss-Wright's mission-critical solutions based on the latest technologies and open standards. These innovative solutions are trusted and proven for aerospace and defense applications.

Classified data-at-rest (DAR) faces both internal and external threats that can subject sensitive data to exploitation.

In this paper, we present performance testing results on Intel hybrid core processors, exploring the performance and efficiency of P-cores vs. E-cores and single-threaded cores vs. hyper-threading cores.

Systems designers must understand the latest enhancements in processing architectures to realize their multiple benefits. The newest multi-core and hybrid-core processors offer enhanced capabilities, including increased processing power and efficiency.